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La ricerca find articoli where soggetti phrase all words 'voltage threshold' sort by level,fasc_key/DESCEND, pagina_ini_num/ASCEND ha restituito 325 riferimenti
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    1. Soeleman, H; Roy, K; Paul, BC
      Robust subthreshold logic for ultra-low power operation

      IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
    2. Filanovsky, IM; Allam, A
      Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits

      IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
    3. Leroy, Y; Cordan, AS; Goltzene, A
      Reduction of the threshold voltage dispersion in nanometer-sized arrays showing Coulomb blockade

      MATERIALS SCIENCE & ENGINEERING C-BIOMIMETIC AND SUPRAMOLECULAR SYSTEMS
    4. Filanovsky, IM; Allam, A; Lim, ST
      Temperature dependence of output voltage generated by interaction of threshold voltage and mobility of an NMOS transistor

      ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
    5. Hayashi, H; Miura, N; Komatsubara, H; Fukuda, K
      A simplified process modeling for reverse short channel effect of threshold voltage of MOSFET

      IEICE TRANSACTIONS ON ELECTRONICS
    6. Kuroda, T
      Low power CMOS design challenges

      IEICE TRANSACTIONS ON ELECTRONICS
    7. Ogasawara, S; Yoon, SM; Ishiwara, H
      Fabrication and characterization of 1T2C-type ferroelectric memory cell

      IEICE TRANSACTIONS ON ELECTRONICS
    8. Kranti, A; Haldar, S; Gupta, RS
      An analytical two-dimensional model for an optically controlled thin-film fully depleted surrounding/cylindrical-gate (SGT) MOSFET

      MICROWAVE AND OPTICAL TECHNOLOGY LETTERS
    9. Choi, YK; Ha, DW; King, TJ; Hu, CM
      Nanoscale ultrathin body PMOSFETs with raised selective germanium source/drain

      IEEE ELECTRON DEVICE LETTERS
    10. Lee, MC; Jung, SH; Song, IH; Han, MK
      A new poly-Si TFT structure with air cavities at the gate-oxide edges

      IEEE ELECTRON DEVICE LETTERS
    11. Kalra, E; Kumar, A; Haldar, S; Gupta, RS
      A semi-empirical approach to analyze small geometry effects in LDD MOSFETs

      MICROELECTRONIC ENGINEERING
    12. Choi, C; Yatsuzuka, K; Asano, K
      Dynamic motion of a conductive particle in viscous fluid under DC electricfield

      IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS
    13. Pio, F; Gomiero, E
      Select transistor modulated cell array structure test application in EEPROM process reliability

      SOLID-STATE ELECTRONICS
    14. Ryou, CR; Hwang, SW; Shin, H; Lee, CH; Park, YJ; Min, HS
      Three-dimensional simulation of discrete oxide charge effects in 0.1 mu m MOSFETs

      SOLID-STATE ELECTRONICS
    15. Ortiz-Conde, A; Cerdeira, A; Estrada, M; Sanchez, FJG; Quintero, R
      A simple procedure to extract the threshold voltage of amorphous thin filmMOSFETs in the saturation region

      SOLID-STATE ELECTRONICS
    16. Kar, GS; Ray, SK; Kim, T; Banerjee, SK; Chakrabarti, NB
      Estimation of hole mobility in strained Si1-xGex buried channel heterostructure PMOSFET

      SOLID-STATE ELECTRONICS
    17. Godoy, A; Lopez-Villanueva, JA; Jimenez-Tejada, JA; Palma, A; Gamiz, F
      A simple subthreshold swing model for short channel MOSFETs

      SOLID-STATE ELECTRONICS
    18. Kranti, A; Haldar, S; Gupta, RS
      An accurate 2D analytical model for short channel thin film fully depletedcylindrical/surrounding gate (CGT/SGT) MOSFET

      MICROELECTRONICS JOURNAL
    19. Ren, HX; Hao, Y
      The influence of doping density on short channel effects immunity in deep sub-micron grooved-gate PMOSFETs

      MICROELECTRONICS JOURNAL
    20. Edgcombe, CJ; Valdre, U
      Microscopy and computational modelling to elucidate the enhancement factorfor field electron emitters

      JOURNAL OF MICROSCOPY-OXFORD
    21. Cho, YH; Kim, BK
      Electro-optic properties of CO2 fixed-polymer/nematic LC composite films

      JOURNAL OF APPLIED POLYMER SCIENCE
    22. Mayergoyz, ID; Andrei, P
      Statistical analysis of semiconductor devices

      JOURNAL OF APPLIED PHYSICS
    23. Chopra, S; Gupta, RS
      Cut-off frequency and transit time analysis in short geometry polysilicon thin-film transistors

      INTERNATIONAL JOURNAL OF ELECTRONICS
    24. Mayergoyz, ID; Andrei, P; Filipovich, I
      Analysis of random dopant-induced effects through numerical solution of randomly perturbed nonlinear Poisson equation

      IEEE TRANSACTIONS ON MAGNETICS
    25. Adan, AO; Higashi, K
      OFF-state leakage current mechanisms in BulkSi and SOI MOSFETs and their impact on CMOS ULSIs standby current

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    26. Yagishita, A; Saito, T; Nakajima, K; Inumiya, S; Matsuo, K; Shibata, T; Tsunashima, Y; Suguro, K; Arikado, T
      Improvement of threshold voltage deviation in damascene metal gate transistors

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    27. Versari, R; Esseni, D; Falavigna, G; Lanzoni, M; Ricco, B
      Optimized programming of multilevel flash EEPROMs

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    28. Lau, MM; Chiang, CYT; Yeow, YT; Yao, ZQ
      A new method of threshold voltage extraction via MOSFET gate-to-substrate capacitance measurement

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    29. Jurczak, M; Skotnicki, T; Gwoziecki, R; Paoli, M; Tormen, B; Ribot, P; Dutartre, D; Monfray, S; Galvier, J
      Dielectric pockets - A new concept of the junctions for deca-nanometric CMOS devices

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    30. Mishima, Y; Yoshino, K; Takei, M; Sasaki, N
      Characteristics of low-temperature poly-Si TFTs on Al/glass substrates

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    31. Hou, YT; Li, MF
      Hole quantization effects and threshold voltage shift in pMOSFET - Assessed by improved one-band effective mass approximation

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    32. Zhou, X; Lim, KY
      Unified MOSFET compact I-V model formulation through physics-based effective transformation

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    33. Benson, J; D'Halleweyn, NV; Redman-White, W; Easson, CA; Uren, MJ; Faynot, O; Pelloie, JL
      A physically based relation between extracted threshold voltage and surface potential flat-band voltage for MOSFET compact modeling

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    34. Cheng, ZY; Ling, CH
      Gate-channel capacitance characteristics in the fully-depleted SOI MOSFET

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    35. Miura-Mattausch, M; Suetake, M; Mattausch, HJ; Kumashiro, S; Shigyo, N; Odanaka, S; Nakayama, N
      Physical modeling of the reverse-short-channel effect for circuit simulation

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    36. Kanda, K; Nose, K; Kawaguchi, H; Sakurai, T
      Design impact of positive temperature dependence on drain current in sub-1-V CMOS VLSIs

      IEEE JOURNAL OF SOLID-STATE CIRCUITS
    37. Omura, Y
      Silicon-on-insulator MOSFET structure for sub-00 nm channel regime and performance perspective

      JOURNAL OF THE ELECTROCHEMICAL SOCIETY
    38. Sano, N; Tomizawa, M
      Random dopant model for three-dimensional drift-diffusion simulations in metal-oxide-semiconductor field-effect-transistors

      APPLIED PHYSICS LETTERS
    39. Kimura, M; Nozawa, R; Inoue, S; Shimoda, T; Lui, BOK; Tam, SWB; Migliorato, P
      Extraction of trap states at the oxide-silicon interface and grain boundary for polycrystalline silicon thin-film transistors

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    40. Hiramoto, T; Takamiya, M; Koura, H; Inukai, T; Gomyo, H; Kawaguchi, H; Sakurai, T
      Optimum device parameters and scalability of variable threshold voltage complementary MOS (VTCMOS)

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    41. Lin, HC; Chen, JTY; Wong, SC
      A new dual floating gate flash cell for multilevel operation

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    42. Hou, YT; Li, MF
      A novel simulation algorithm for Si valence hole quantization of inversionlayer in metal-oxide-semiconductor devices

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS
    43. Iwata, H
      Self-consistent calculations of performance parameters in highly doped silicon-on-insulator metal-oxide-semiconductor field-effect transistors

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS
    44. Baccarani, G; Reggiani, S
      Performance limits of CMOS technology and perspectives of quantum devices

      COMPTES RENDUS DE L ACADEMIE DES SCIENCES SERIE IV PHYSIQUE ASTROPHYSIQUE
    45. Gross, WJ; Vasileska, D; Ferry, DK
      3D simulations of ultra-small MOSFETs with real-space treatment of the electron-electron and electron-ion interactions

      VLSI DESIGN
    46. Wang, JP; Xu, NJ; Zhang, TQ; Tang, HL; Liu, JL; Liu, CY; Yao, YJ; Peng, HL; He, BP; Zhang, ZX
      Temperature effects of gamma-irradiated metal-oxide-semiconductor field-effect-transistor

      ACTA PHYSICA SINICA
    47. Chou, JC; Chiang, JL
      Study on the amorphous tungsten trioxide ion-sensitive field effect transistor

      SENSORS AND ACTUATORS B-CHEMICAL
    48. Hatfield, JV; Covington, JA; Gardner, JW
      GasFETs incorporating conducting polymers as gate materials

      SENSORS AND ACTUATORS B-CHEMICAL
    49. Chou, JC; Chiang, JL
      Ion sensitive field effect transistor with amorphous tungsten trioxide gate for pH sensing

      SENSORS AND ACTUATORS B-CHEMICAL
    50. Dai, Y; Jones, KE; Fedirchuk, B; Jordan, LM
      Effects of voltage trajectory on action potential voltage threshold in simulations of cat spinal motoneurons

      NEUROCOMPUTING
    51. Hiramoto, T; Takamiya, M
      Low power and low voltage MOSFETs with variable threshold voltage controlled by back-bias

      IEICE TRANSACTIONS ON ELECTRONICS
    52. Kuroda, T; Fujita, T; Hatori, F; Sakurai, T
      Variable threshold-voltage CMOS technology

      IEICE TRANSACTIONS ON ELECTRONICS
    53. Kato, N; Akita, Y; Hiraki, M; Yamashita, T; Shimizu, T; Maki, F; Yano, K
      Random modulation: Multi-threshold-voltage design methodology in sub-2-V power supply CMOS

      IEICE TRANSACTIONS ON ELECTRONICS
    54. Consoli, A; Gennaro, F; Testa, A; Consentino, G; Frisina, F; Letor, R; Magri, A
      Thermal instability of low voltage power-MOSFET's

      IEEE TRANSACTIONS ON POWER ELECTRONICS
    55. Yasuda, Y; Takamiya, M; Hiramoto, T
      Threshold voltage fluctuations induced by statistical 'position' and 'number' impurity fluctuations in bulk MOSFETs

      SUPERLATTICES AND MICROSTRUCTURES
    56. Vasileska, D; Gross, WJ; Ferry, DK
      Monte Carlo particle-based simulations of deep-submicron n-MOSFETs with real-space treatment of electron-electron and electron-impurity interactions

      SUPERLATTICES AND MICROSTRUCTURES
    57. Asenov, A; Slavcheva, G; Brown, AR; Balasubramaniam, R; Davies, JH
      Statistical 3D 'atomistic' simulation of decanano MOSFETs

      SUPERLATTICES AND MICROSTRUCTURES
    58. Majima, H; Ishikuro, H; Hiramoto, T
      Experimental evidence for quantum mechanical narrow channel effect in ultra-narrow MOSFET's

      IEEE ELECTRON DEVICE LETTERS
    59. Lun, Z; Ang, DS; Ling, CH
      A novel subthreshold slope technique for the extraction of the buried-oxide interface trap density in fully depleted SOI MOSFET

      IEEE ELECTRON DEVICE LETTERS
    60. Lebedev, E; Forero, S; Brutting, W; Schwoerer, M
      Switching effect in poly(p-phenylenevinylene)

      SYNTHETIC METALS
    61. Koyama, A; Uchida, M; Aida, T; Kudo, J; Ttsuge, M
      Switching well noise modeling and minimization strategy for digital circuits with a controllable threshold voltage scheme

      IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
    62. Chopra, S; Gupta, RS
      An analytical model for current-voltage characteristics of a small-geometry poly-Si thin-film transistor

      SEMICONDUCTOR SCIENCE AND TECHNOLOGY
    63. Shinada, T; Ishikawa, A; Hinoshita, C; Koh, M; Ohdomari, I
      Flat-band voltage control of a back-gate MOSFET by single ion implantation

      APPLIED SURFACE SCIENCE
    64. Chopra, S; Gupta, RS
      An analytical model for turn-on characteristics of short channel polycrystalline-silicon thin-film transistor for circuit simulation

      MICROELECTRONIC ENGINEERING
    65. Shang, HL; White, MH
      An ultra-thin midgap gate FDSOI MOSFET

      SOLID-STATE ELECTRONICS
    66. Liu, XY; Kang, JF; Guan, XD; Han, RQ; Wang, YY
      The influence of tunneling effect and inversion layer quantization effect on threshold voltage of deep submicron MOSFETs

      SOLID-STATE ELECTRONICS
    67. Klos, A; Kostka, A
      PREDICTMOS - a predictive compact model of small-geometry MOSFETs for circuit simulation and device scaling calculations

      SOLID-STATE ELECTRONICS
    68. Ma, YT; Liu, LT; Yu, ZP; Li, ZJ
      Characterization and modeling of threshold voltage shift due to quantum mechanical effects in pMOSFET

      SOLID-STATE ELECTRONICS
    69. Suzuki, K; Sudo, R
      Conditions of ion implantation into thin amorphous Si gate layers for suppressing threshold voltage shift

      SOLID-STATE ELECTRONICS
    70. Ma, YT; Li, ZJ; Liu, LT; Tian, LL; Yu, ZP
      Effective density-of-states approach to QM correction in MOS structures

      SOLID-STATE ELECTRONICS
    71. Nicolett, AS; Martino, JA; Simoen, E; Claeys, C
      Simultaneous extraction of the silicon film and front oxide thicknesses onfully depleted SOI nMOSFETs

      SOLID-STATE ELECTRONICS
    72. Zhang, J; Yuan, JS; Ma, Y
      Modeling short channel effect on high-k and stacked-gate MOSFETs

      SOLID-STATE ELECTRONICS
    73. Ma, Y; Liu, L; Li, Z
      Surface layer effective density-of-states (SLEDOS) and its applications inMOS devices modeling

      MICROELECTRONICS JOURNAL
    74. Ma, YT; Liu, LT; Yu, ZP; Li, ZJ
      Thorough analysis of quantum mechanical effects on MOS structure characteristics in threshold region

      MICROELECTRONICS JOURNAL
    75. Samudra, G; Rajendran, K
      Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

      INTERNATIONAL JOURNAL OF ELECTRONICS
    76. Suzuki, K
      Short channel MOSFET model using a universal channel depletion width parameter

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    77. Wang, AW; Saraswat, KC
      A strategy for modeling of variations due to grain size in polycrystallinethin-film transistors

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    78. Lin, SC; Kuo, JB; Huang, KT; Sun, SW
      A closed-form back-gate-bias related inverse narrow-channel effect model for deep-submicron VLSI CMOS devices using shallow trench isolation

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    79. Oishi, T; Shiozawa, K; Furukawa, A; Abe, Y; Tokuda, Y
      Isolation edge effect depending on gate length of MOSFET's with various isolation structures

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    80. Murakami, E; Yoshimura, T; Goto, Y; Kimura, S
      Gate length scalability of n-MOSFET's down to 30 nm: Comparison between LDD and non-LDD structures

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    81. Wang, HM; Chan, MS; Wang, YY; Ko, PK
      The behavior of narrow-width SOI MOSFET's with MESA isolation

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    82. Lim, BC; Choi, YJ; Choi, JH; Jang, J
      Hydrogenated amorphous silicon thin film transistor fabricated on plasma treated silicon nitride

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    83. Lee, YT; Woo, DS; Lee, JD; Park, BG
      Threshold voltage reduction model for buried channel PMOSFETs using quasi-2-D Poisson equation

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    84. Suzuki, K
      Short channel epi-MOSFET model

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    85. Chopra, S; Gupta, RS
      Modeling of short geometry polycrystalline-silicon thin-film transistor

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    86. Gross, WJ; Vasileska, D; Ferry, DK
      Ultrasmall MOSFETs: The importance of the full coulomb interaction on device characteristics

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    87. Yasuda, Y; Takamiya, M; Hiramoto, T
      Separation of effects of statistical impurity number fluctuations and position distribution on Vth fluctuations in scaled MOSFETs

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    88. Williams, SC; Kim, KW; Holton, WC
      Ensemble Monte Carlo study of channel quantization in a 25-nm n-MOSFET

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    89. Zhou, X; Lim, KY; Lim, D
      A general approach to compact threshold voltage formulation based on 2-D numerical simulation and experimental correlation for deep-submicron ULSI technology development

      IEEE TRANSACTIONS ON ELECTRON DEVICES
    90. Shin, JS; Chung, IY; Park, YJ; Min, HS
      A new charge pump without degradation in threshold voltage due to body effect

      IEEE JOURNAL OF SOLID-STATE CIRCUITS
    91. Kao, JT; Chandrakasan, AP
      Dual-threshold voltage techniques for low-power digital circuits

      IEEE JOURNAL OF SOLID-STATE CIRCUITS
    92. Sako, T; Furukawa, T; Kaneko, T; Sakaigawa, A; Koden, M
      Temperature dependence of practical tau-Vmin mode FLC materials

      FERROELECTRICS
    93. Yano, H; Hirao, T; Kimoto, T; Matsunami, H
      High channel mobility in inversion layer of SiC MOSFETs for power switching transistors

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    94. Koh, R
      Simulated threshold voltage adjustment and drain current enhancement in novel striped-gate nondoped-channel fully depleted SOI-MOSFETs

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    95. Inukai, T; Hiramoto, T
      Suppression of stand-by tunnel current in ultra-thin gate oxide MOSFETs bydual oxide thickness-multiple threshold voltage CMOS (DOT-MTCMOS)

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    96. Koura, H; Takamiya, M; Hiramoto, T
      Optimum conditions of body effect factor and substrate bias in variable threshold voltage MOSFETs

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    97. Kodama, S; Furuta, T; Watanabe, N; Ito, H; Kanda, A; Muraguchi, M; Ishibashi, T
      Variable threshold AlGaAs/InGaAs heterostructure field-effect transistors with paired gates fabricated using the wafer-bonding technique

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    98. Ohba, R; Sugiyama, N; Koga, J; Uchida, K; Toriumi, A
      Influence of channel depletion on the carrier charging characteristics in Si nanocrystal floating gate memory

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    99. Iba, Y; Taguchi, T; Kumasaka, F; Iizuka, T; Sambonsugi, Y; Aoyama, H; Deguchi, K; Fukuda, M; Oda, M; Morita, H; Matsuda, T; Horiuchi, K; Matsui, Y
      Sub-100-nm device fabrication using proximity X-ray lithography at five levels

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
    100. Shinada, T; Ishikawa, A; Hinoshita, C; Koh, M; Ohdomari, I
      Reduction of fluctuation in semiconductor conductivity by one-by-one ion implantation of dopant atoms

      JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS


ASDD Area Sistemi Dipartimentali e Documentali, Università di Bologna, Catalogo delle riviste ed altri periodici
Documento generato il 13/08/20 alle ore 20:00:46