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Titolo:
A new laser-processed polysilicon TFT architecture
Autore:
Fulks, RT; Ho, J; Boyce, JB;
Indirizzi:
Xerox Corp, Palo Alto Res Ctr, Elect Mat Lab, Palo Alto, CA 94304 USA Xerox Corp Palo Alto CA USA 94304 Elect Mat Lab, Palo Alto, CA 94304 USA
Titolo Testata:
IEEE ELECTRON DEVICE LETTERS
fascicolo: 2, volume: 22, anno: 2001,
pagine: 86 - 88
SICI:
0741-3106(200102)22:2<86:ANLPTA>2.0.ZU;2-S
Fonte:
ISI
Lingua:
ENG
Soggetto:
THIN-FILM TRANSISTORS;
Keywords:
laser crystallization; poly-Si TFT; thin-film transistor;
Tipo documento:
Article
Natura:
Periodico
Settore Disciplinare:
Engineering, Computing & Technology
--discip_EC--
Citazioni:
8
Recensione:
Indirizzi per estratti:
Indirizzo: Fulks, RT Xerox Corp, Palo Alto Res Ctr, Elect Mat Lab, 3333 Coyote Hill Rd, Palo Alto, CA 94304 USA Xerox Corp 3333 Coyote Hill Rd Palo Alto CA USA 94304 94304 USA
Citazione:
R.T. Fulks et al., "A new laser-processed polysilicon TFT architecture", IEEE ELEC D, 22(2), 2001, pp. 86-88

Abstract

A new top gate polysilicon thin-film transistor (TFT) architecture is introduced which requires only a single laser process step to simultaneously crystallize the channel and activate the source-drain, The dummy-gate TFT (DGTFT) uses a light blocking layer patterned with the gate mask combined withtwo backside expose steps to allow a self- aligned device structure, N-channel TFTs fabricated using the new process have held effect mobilities greater than 100 cm(2)/Vs. By controlling the backside exposures it is also possible to form offset or graded doping structures to reduce field enhanced leakage currents.

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Documento generato il 01/12/20 alle ore 08:00:50