Catalogo Articoli (Spogli Riviste)

OPAC HELP

Titolo:
Modeling of short geometry polycrystalline-silicon thin-film transistor
Autore:
Chopra, S; Gupta, RS;
Indirizzi:
Univ Delhi, Dept Elect Sci, New Delhi 110021, India Univ Delhi New DelhiIndia 110021 ept Elect Sci, New Delhi 110021, India Acharya Narendra Dev Coll, Dept Phys, New Delhi 110019, India Acharya Narendra Dev Coll New Delhi India 110019 New Delhi 110019, India
Titolo Testata:
IEEE TRANSACTIONS ON ELECTRON DEVICES
fascicolo: 12, volume: 47, anno: 2000,
pagine: 2444 - 2446
SICI:
0018-9383(200012)47:12<2444:MOSGPT>2.0.ZU;2-8
Fonte:
ISI
Lingua:
ENG
Soggetto:
POLY-SI; THRESHOLD VOLTAGE; TFTS; CIRCUITS; DRIVER;
Keywords:
grain boundary; poly-Si; short geometry effect;
Tipo documento:
Article
Natura:
Periodico
Settore Disciplinare:
Engineering, Computing & Technology
--discip_EC--
Citazioni:
13
Recensione:
Indirizzi per estratti:
Indirizzo: Chopra, S Univ Delhi, Dept Elect Sci, S Campus, New Delhi 110021, India Univ Delhi S Campus New Delhi India 110021 Delhi 110021, India
Citazione:
S. Chopra e R.S. Gupta, "Modeling of short geometry polycrystalline-silicon thin-film transistor", IEEE DEVICE, 47(12), 2000, pp. 2444-2446

Abstract

An accurate model for the device characteristics of a short geometry polysilicon thin-film transistor (poly-Si TFT) is developed. The proposed channel length dependent threshold voltage and the current-voltage (I-V) characteristics determined are in excellent agreement with experimental results confirming the validity of this model. The impact of the grain size on device characteristics is also shown.

ASDD Area Sistemi Dipartimentali e Documentali, Università di Bologna, Catalogo delle riviste ed altri periodici
Documento generato il 29/11/20 alle ore 00:53:42