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Titolo:
MAPPING OF NEURAL NETWORKS ONTO THE MEMORY-PROCESSOR INTEGRATED ARCHITECTURE
Autore:
KIM Y; NOH MJ; HAN TD; KIM SD;
Indirizzi:
YONSEI UNIV,DEPT COMP SCI,134 SHINCHON DONG SEOUL 120749 SOUTH KOREA YONSEI UNIV,DEPT COMP SCI SEOUL 120749 SOUTH KOREA
Titolo Testata:
Neural networks
fascicolo: 6, volume: 11, anno: 1998,
pagine: 1083 - 1098
SICI:
0893-6080(1998)11:6<1083:MONNOT>2.0.ZU;2-M
Fonte:
ISI
Lingua:
ENG
Soggetto:
MACHINES; ARRAY;
Keywords:
PARALLEL PROCESSING; MEMORY-PROCESSOR INTEGRATION; MULTILAYER PERCEPTRON; BACKPROPAGATION LEARNING; ALGORITHMIC MAPPING;
Tipo documento:
Article
Natura:
Periodico
Settore Disciplinare:
CompuMath Citation Index
Science Citation Index Expanded
Citazioni:
20
Recensione:
Indirizzi per estratti:
Citazione:
Y. Kim et al., "MAPPING OF NEURAL NETWORKS ONTO THE MEMORY-PROCESSOR INTEGRATED ARCHITECTURE", Neural networks, 11(6), 1998, pp. 1083-1098

Abstract

In this paper, an effective memory-processor integrated architecture,called memory-based processor array for artificial neural networks (MPAA), is proposed. The MPAA can be easily integrated into any host system via memory interface. Specifically, the MPA system provides an efficient mechanism for its local memory accesses allowed by row and column bases, using hybrid row and column decoding, which is suitable for computation models of ANNs such as the accessing and alignment patterns given for matrix-by-vector operations. Mapping algorithms to implement the multilayer perceptron with backpropagation learning on the MPAAsystem are also provided. The proposed algorithms support both neuronand layer level parallelisms which allow the MPAA system to operate the learning phase as well as the recall phase in the pipelined fashion. Performance evaluation is provided by detailed comparison in terms of two metrics such as the cost and number of computation steps. The results show that the performance of the proposed architecture and algorithms is superior to those of the previous approaches, such as one-dimensional single-instruction multiple data (SIMD) arrays, two-dimensional SIMD arrays, systolic ring structures, and hypercube machines. (C) 1998 Elsevier Science Ltd. All rights reserved.

ASDD Area Sistemi Dipartimentali e Documentali, Università di Bologna, Catalogo delle riviste ed altri periodici
Documento generato il 11/07/20 alle ore 17:34:43