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Titolo:
MODULE SCHEDULING WITH REDUCED REGISTER PRESSURE
Autore:
LLOSA J; VALERO M; AYGUADE E; GONZALEZ A;
Indirizzi:
UNIV POLITECN CATALUNYA,DEPT ARQUITECTURA COMPUTADORS BARCELONA SPAIN
Titolo Testata:
I.E.E.E. transactions on computers
fascicolo: 6, volume: 47, anno: 1998,
pagine: 625 - 638
SICI:
0018-9340(1998)47:6<625:MSWRRP>2.0.ZU;2-I
Fonte:
ISI
Lingua:
ENG
Keywords:
INSTRUCTION SCHEDULING; LOOP SCHEDULING; SOFTWARE PIPELINING; REGISTER ALLOCATION; REGISTER SPILLING;
Tipo documento:
Article
Natura:
Periodico
Settore Disciplinare:
CompuMath Citation Index
Science Citation Index Expanded
Science Citation Index Expanded
Citazioni:
30
Recensione:
Indirizzi per estratti:
Citazione:
J. Llosa et al., "MODULE SCHEDULING WITH REDUCED REGISTER PRESSURE", I.E.E.E. transactions on computers, 47(6), 1998, pp. 625-638

Abstract

Software pipelining is a scheduling technique that is used by some product compilers in order to expose more instruction level parallelism out of innermost loops. Module scheduling refers to a class of algorithms for software pipelining. Most previous research on module scheduling has focused on reducing the number of cycles between the initiationof consecutive iterations (which is termed II) but has not consideredthe effect of the register pressure of the produced schedules. The register pressure increases as the instruction level parallelism increases. When the register requirements of a schedule are higher than the available number of registers, the loop must be rescheduled perhaps with a higher II. Therefore, the register pressure has an important impact on the performance of a schedule. This paper presents a novel heuristic module scheduling strategy that tries to generate schedules with the lowest II, and, from all the possible schedules with such Il, it tries to select that with the lowest register requirements. The proposedmethod has been implemented in an experimental compiler and has been tested for the Perfect Club benchmarks. The results show that the proposed method achieves an optimal II for at least 97.5 percent of the loops and its compilation time is comparable to a conventional top-down approach, whereas the register requirements are lower. In addition, the proposed method is compared with some other existing methods. The results indicate that the proposed method performs better than other heuristic methods and almost as well as linear programming methods, whichobtain optimal solutions but are impractical for product compilers because their computing cost grows exponentially with the number of operations in the loop body.

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Documento generato il 07/07/20 alle ore 19:12:12