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Titolo:
QUANTITATIVE-EVALUATION OF REGISTER PRESSURE ON SOFTWARE PIPELINED LOOPS
Autore:
LLOSA J; AYGUADE E; VALERO M;
Indirizzi:
UNIV POLITECN CATALUNA,DEPT ARQUITECTURA COMPUTADORS,CR JORDI GIRONA 1-3,MODUL D6 BARCELONA 08034 SPAIN
Titolo Testata:
International journal of parallel programming
fascicolo: 2, volume: 26, anno: 1998,
pagine: 121 - 142
SICI:
0885-7458(1998)26:2<121:QORPOS>2.0.ZU;2-N
Fonte:
ISI
Lingua:
ENG
Soggetto:
MICROPROCESSOR;
Keywords:
SOFTWARE PIPELINING; REGISTER REQUIREMENTS; SPILL CODE; LOOP TRANSFORMATIONS; PERFORMANCE EVALUATION;
Tipo documento:
Article
Natura:
Periodico
Settore Disciplinare:
CompuMath Citation Index
Science Citation Index Expanded
Citazioni:
46
Recensione:
Indirizzi per estratti:
Citazione:
J. Llosa et al., "QUANTITATIVE-EVALUATION OF REGISTER PRESSURE ON SOFTWARE PIPELINED LOOPS", International journal of parallel programming, 26(2), 1998, pp. 121-142

Abstract

Software Pipelining is a loop scheduling technique that extracts loopparallelism by overlapping the execution of several consecutive iterations. One of the drawbacks oi software pipelining is its high register requirements, which increase with the number of Functional units andtheir degree of pipelining. This paper analyzes the register requirements of software pipelined loops. it also evaluates the effects on performance of the addition of spill code. Spill code is needed when the number of registers required by the software pipelined loop is larger than the number of registers of the target machine. This spill code increases memory traffic and can reduce performance. Finally, compilers can apply transformations in order to reduce the number of memory accesses and increase functional unit utilization. The paper also evaluates the negative effect on register requirements that some of these transformations might produce on loops.

ASDD Area Sistemi Dipartimentali e Documentali, Università di Bologna, Catalogo delle riviste ed altri periodici
Documento generato il 14/07/20 alle ore 10:14:29