Catalogo Articoli (Spogli Riviste)

OPAC HELP

Titolo:
ON MULTISTAGE INTERCONNECTION NETWORKS WITH SMALL CLOCK CYCLES
Autore:
YOUN HY; MUN YS;
Indirizzi:
UNIV TEXAS,DEPT COMP SCI & ENGN ARLINGTON TX 76019
Titolo Testata:
IEEE transactions on parallel and distributed systems
fascicolo: 1, volume: 6, anno: 1995,
pagine: 86 - 93
SICI:
1045-9219(1995)6:1<86:OMINWS>2.0.ZU;2-B
Fonte:
ISI
Lingua:
ENG
Soggetto:
PERFORMANCE ANALYSIS; MULTIPROCESSORS;
Keywords:
BIG AND SMALL CLOCK CYCLES; DELAY; MULTISTAGE INTERCONNECTION NETWORKS; PACKET SWITCHING; THROUGHPUT;
Tipo documento:
Note
Natura:
Periodico
Settore Disciplinare:
CompuMath Citation Index
Science Citation Index Expanded
Science Citation Index Expanded
Citazioni:
18
Recensione:
Indirizzi per estratti:
Citazione:
H.Y. Youn e Y.S. Mun, "ON MULTISTAGE INTERCONNECTION NETWORKS WITH SMALL CLOCK CYCLES", IEEE transactions on parallel and distributed systems, 6(1), 1995, pp. 86-93

Abstract

In packet switching using multistage interconnection networks ((MIN's), it is generally assumed that the packet movements successively propagate from the last stage to the first stage in one network cycle. Ding and Bhuyan, however, has shown that the network performance can be significantly improved if the packet movements are confined within eachpair of adjacent stages using small clock cycles. In this short note,we present a model for estimating the performance of multibuffered MIN's employing the approach. Using the model, the relative effectiveness of the approach is identified compared to the traditional design.

ASDD Area Sistemi Dipartimentali e Documentali, Università di Bologna, Catalogo delle riviste ed altri periodici
Documento generato il 27/11/20 alle ore 20:51:16