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Titolo:
IMPLEMENTATION OF MATRIX DECOMPOSITION STRUCTURES OF 2-D DIGITAL-FILTERS VIA VLSI ARRAY PROCESSORS
Autore:
MERTZIOS BG; VENETSANOPOULOS AN;
Indirizzi:
DEMOCRITUS UNIV THRACE,DEPT ELECT & COMP ENGN GR-67100 XANTHI GREECE UNIV TORONTO,DEPT ELECT & COMP ENGN TORONTO ON M5S 1A4 CANADA
Titolo Testata:
Circuits, systems, and signal processing
fascicolo: 1, volume: 14, anno: 1995,
pagine: 39 - 55
SICI:
0278-081X(1995)14:1<39:IOMDSO>2.0.ZU;2-N
Fonte:
ISI
Lingua:
ENG
Soggetto:
FAST BLOCK IMPLEMENTATION; DIMENSIONAL FILTERS; REALIZATION; PARALLELISM; THEOREM; SYSTEMS; CHIPS;
Tipo documento:
Article
Natura:
Periodico
Settore Disciplinare:
Science Citation Index Expanded
Citazioni:
41
Recensione:
Indirizzi per estratti:
Citazione:
B.G. Mertzios e A.N. Venetsanopoulos, "IMPLEMENTATION OF MATRIX DECOMPOSITION STRUCTURES OF 2-D DIGITAL-FILTERS VIA VLSI ARRAY PROCESSORS", Circuits, systems, and signal processing, 14(1), 1995, pp. 39-55

Abstract

This paper describes an implementation of 2-D FIR and IIR linear digital filters via VLSI array processors. The underlying realization structures are based on the matrix decomposition approach. The 2-D concurrent processing is used in order to implement the row and column delayswithin the cycle time. A high degree of concurrency is achieved by exploiting the pipelining of the array processors with the inherent parallelism of the matrix decomposition structure. The resulting structures are modular, and regular, use only local communication and internal local feedback loops, and achieve high throughput and sampling rates.

ASDD Area Sistemi Dipartimentali e Documentali, Università di Bologna, Catalogo delle riviste ed altri periodici
Documento generato il 11/08/20 alle ore 15:36:13